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# /space/home/slher/rel/Beken/v6_4_5/macsw/plf/refip/src/driver/intc/tl4xx/intc.c

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    00001
    00020 /*
    00021  * INCLUDE FILES
    00022  ****************************************************************************************
    00023  */
    00024 // for target dependent compilation directives
    00025 #include "rwnx_config.h"
    00026 // for __IRQ
    00027 #include "compiler.h"
    00028 #include "intc.h"
    00029
    00030 #include "reg_intc.h"
    00031 #include "sysctrl.h"
    00032 #include "ipc_emb.h"
    00033 #include "hal_machw.h"
    00034 #include "txl_cntrl.h"
    00035 #include "macif.h"
    00036 #include "rxl_cntrl.h"
    00037 #include "rxl_hwdesc.h"
    00038 #include "hal_dma.h"
    00039 #include "dma.h"
    00040 #include "rd.h"
    00041
    00042
    00043 /*
    00044  * FUNCTION DEFINITIONS
    00045  ****************************************************************************************
    00046  */
    00052 void intc_spurious(void)
    00053 {
    00054     // force error
    00055     ASSERT_ERR(0);
    00056 }
    00057
    00059 typedef void (*void_fn)(void);
    00060
    00062 static const void_fn intc_irq_handlers[64] =
    00063 {
    00064     [INTC_LLI15] = intc_spurious,
    00065     [INTC_LLI14] = intc_spurious,
    00066     [INTC_LLI13] = intc_spurious,
    00067     [INTC_LLI12] = intc_spurious,
    00068     #if (NX_GP_DMA)
    00069     [INTC_LLI11] = hal_dma_ul_irq,
    00070     #else //(NX_GP_DMA)
    00071     [INTC_LLI11] = intc_spurious,
    00072     #endif //(NX_GP_DMA)
    00073     [INTC_LLI10] = intc_spurious,
    00074     #if (NX_GP_DMA)
    00075     [INTC_LLI9] = hal_dma_dl_irq,
    00076     #else //(NX_GP_DMA)
    00077     [INTC_LLI9] = intc_spurious,
    00078     #endif //(NX_GP_DMA)
    00079     #if NX_FULLY_HOSTED
    00080     [INTC_LLI8] = NULL,
    00081     #else
    00082     [INTC_LLI8] = macif_tx_cfm_dma_int_handler,
    00083     #endif
    00084     [INTC_LLI7] = ipc_emb_dbg_dma_int_handler,
    00085     [INTC_LLI6] = ipc_emb_msg_dma_int_handler,
    00086     [INTC_LLI5] = rxl_dma_int_handler,
    00087     #if !NX_FULLY_HOSTED
    00088     [INTC_LLI4] = txl_cntrl_dma_isr,
    00089     [INTC_LLI3] = txl_cntrl_dma_isr,
    00090     [INTC_LLI2] = txl_cntrl_dma_isr,
    00091     [INTC_LLI1] = txl_cntrl_dma_isr,
    00092     [INTC_LLI0] = txl_cntrl_dma_isr,
    00093     [INTC_IPC3] = ipc_emb_tx_irq,
    00094     [INTC_IPC2] = ipc_emb_cfmback_irq,
    00095     [INTC_IPC1] = ipc_emb_msg_irq,
    00096     #endif
    00097     [INTC_IPC0] = intc_spurious,
    00098     [INTC_MACINTGEN] = hal_machw_gen_handler,
    00099     #if (NX_BW_LEN_ADAPT)
    00100     [INTC_MACPROT] = txl_prot_trigger,
    00101     #else
    00102     [INTC_MACPROT] = intc_spurious,
    00103     #endif
    00104     [INTC_MACTX] = txl_transmit_trigger,
    00105     [INTC_MACRX] = rxl_mpdu_isr,
    00106     [INTC_MACOTHER] = intc_spurious,
    00107     [INTC_MACTIMER] = rxl_mpdu_isr,
    00108     [INTC_DMA_BUSERR] = dma_buserr_isr,
    00109     [INTC_MODEM] = phy_mdm_isr,
    00110     [INTC_RC] = phy_rc_isr
    00111 };
    00112
    00113
    00121 static void intc_enable_irq(int index)
    00122 {
    00123     int reg_idx = index / 32;
    00124     int bit_idx = index % 32;
    00125
    00126     intc_irq_unmask_set(reg_idx, CO_BIT(bit_idx));
    00127 }
    00128
    00136 static void intc_disable_irq(int index)
    00137 {
    00138     int reg_idx = index / 32;
    00139     int bit_idx = index % 32;
    00140
    00141     intc_irq_unmask_clear(reg_idx, CO_BIT(bit_idx));
    00142 }
    00143
    00144 void intc_init(void)
    00145 {
    00146     // enable the supported interrupts
    00147     #if !NX_FULLY_HOSTED
    00148     intc_enable_irq(INTC_IPC3);
    00149     intc_enable_irq(INTC_IPC2);
    00150     intc_enable_irq(INTC_IPC1);
    00151     intc_enable_irq(INTC_LLI8);
    00152     #endif
    00153     intc_enable_irq(INTC_LLI0);
    00154     intc_enable_irq(INTC_LLI1);
    00155     intc_enable_irq(INTC_LLI2);
    00156     intc_enable_irq(INTC_LLI3);
    00157     intc_enable_irq(INTC_LLI4);
    00158     intc_enable_irq(INTC_LLI5);
    00159     intc_enable_irq(INTC_LLI6);
    00160     intc_enable_irq(INTC_LLI7);
    00161     intc_enable_irq(INTC_DMA_BUSERR);
    00162     #if (NX_GP_DMA)
    00163     intc_enable_irq(INTC_LLI9);
    00164     intc_enable_irq(INTC_LLI11);
    00165     #endif
    00166     intc_enable_irq(INTC_MACPROT);
    00167     intc_enable_irq(INTC_MACTX);
    00168     intc_enable_irq(INTC_MACTIMER);
    00169     intc_enable_irq(INTC_MACRX);
    00170     intc_enable_irq(INTC_MACINTGEN);
    00171     intc_enable_irq(INTC_MODEM);
    00172     intc_enable_irq(INTC_RC);
    00173 }
    00174
    00175
    00176 void intc_irq(void)
    00177 {
    00178     LED_OFF(LED_SLEEP);
    00179
    00180     // Check if we have some interrupts pending
    00181     if (intc_irq_status_get(0) || intc_irq_status_get(1))
    00182     {
    00183         int irq_idx = intc_irq_index_get();
    00184
    00185         ASSERT_ERR(intc_irq_handlers[irq_idx] != NULL);
    00186
    00187         // call the function handler
    00188         intc_irq_handlers[irq_idx]();
    00189     }
    00190 }
    00191