> ## clock_reset_integrity

> The aim of this goal is to check the integrity of clock and reset logic in a design. The violations can be analyzed in the following order:

> 1. Analyze and fix basic clock issues reported by the following rules:

> Clock_check01, Clock_check04, Clock_info05b, Clock_converge01, Ar_converge01

> 2. Analyze and fix race and glitch issues reported by the following rules:

> Clock_glitch02, Clock_glitch03, Clock_glitch04, Clock_Reset_check01, Clock_Reset_check02, Clock_Reset_check03, ClockEnableRace

> 3. Analyze and fix basic issues in reset logic reported by the following rules:

> Reset_check01, Reset_check02, Reset_check03, Reset_check04, Reset_check06, Reset_check07