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# /space/home/slher/rel/Beken/v6_4_5/macsw/plf/refip/src/driver/dma/dma.h

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    00001
    00013 #ifndef _IPC_DMA_H_
    00014 #define _IPC_DMA_H_
    00015
    00016 /*
    00017  * INCLUDE FILES
    00018  ****************************************************************************************
    00019  */
    00020 #include "co_int.h"
    00021
    00022 // for target dependent macros
    00023 #include "rwnx_config.h"
    00024
    00025 // for CO_BIT macro
    00026 #include "co_math.h"
    00027
    00028 // for __INLINE
    00029 #include "compiler.h"
    00030
    00031 // for register address
    00032 #include "reg_dma.h"
    00033
    00034
    00041
    00042 enum
    00043 {
    00045     IPC_DMA_CHANNEL_CTRL_RX,
    00047     IPC_DMA_CHANNEL_DATA_RX,
    00049     IPC_DMA_CHANNEL_CTRL_TX,
    00051     IPC_DMA_CHANNEL_DATA_TX,
    00053     IPC_DMA_CHANNEL_INTERNAL,
    00055     IPC_DMA_CHANNEL_MAX,
    00056 };
    00057
    00065 enum
    00066 {
    00068     IPC_DMA_LLI_DATA_AC0_TX,
    00070     IPC_DMA_LLI_DATA_AC1_TX,
    00072     IPC_DMA_LLI_DATA_AC2_TX,
    00074     IPC_DMA_LLI_DATA_AC3_TX,
    00076     IPC_DMA_LLI_DATA_BCN_TX,
    00078     IPC_DMA_LLI_DATA_RX0,
    00080     IPC_DMA_LLI_MSG,
    00082     IPC_DMA_LLI_DBG,
    00084     IPC_DMA_LLI_CFM_TX,
    00086     IPC_DMA_LLI_GP_DL,
    00088     IPC_DMA_LLI_DBG_DUMP,
    00090     IPC_DMA_LLI_GP_UL,
    00092     IPC_DMA_LLI_MAX
    00093 };
    00094
    00095 #if NX_BEACONING
    00097 #define IPC_DMA_LLI_TX_MASK         0x001F
    00098 #else
    00100 #define IPC_DMA_LLI_TX_MASK         0x000F
    00101 #endif
    00103 #define IPC_DMA_LLI_CFM_MASK        0x0100
    00104
    00106 #define IPC_DMA_LLI_RX_MASK         0x0020
    00107
    00109 #define IPC_DMA_LLI_COUNTER_EN      0x0010
    00111 #define IPC_DMA_LLI_COUNTER_MASK    0x000F
    00113 #define IPC_DMA_LLI_COUNTER_POS     0
    00114
    00116 #define IPC_DMA_LLI_IRQ_EN          0x1000
    00118 #define IPC_DMA_LLI_IRQ_MASK        0x0F00
    00120 #define IPC_DMA_LLI_IRQ_POS         8
    00121
    00123 struct dma_desc
    00124 {
    00127     uint32_t            src;
    00130     uint32_t            dest;
    00132     uint16_t            length;
    00134     uint16_t            ctrl;
    00136     uint32_t            next;
    00137 };
    00138
    00140 struct dma_env_tag
    00141 {
    00145     volatile struct dma_desc *last_dma[IPC_DMA_CHANNEL_MAX];
    00146 };
    00147
    00149 extern struct dma_env_tag dma_env;
    00150
    00156 void dma_init(void);
    00157
    00158
    00169 void dma_push(struct dma_desc *first, struct dma_desc *last, int channel_idx);
    00170
    00171
    00178 void dma_buserr_isr(void);
    00179
    00180
    00181 #if NX_EMB
    00182
    00190 __INLINE void dma_lli_disable(int lli)
    00191 {
    00192     dma_int_unmask_lli_irq_clearf(CO_BIT(lli));
    00193 }
    00194
    00203 __INLINE void dma_lli_enable(int lli)
    00204 {
    00205     dma_int_unmask_lli_irq_setf(CO_BIT(lli));
    00206 }
    00207
    00208
    00217 __INLINE void dma_lli_poll(int lli)
    00218 {
    00219     while (!(dma_int_status_get() & CO_BIT(lli)));
    00220 }
    00221 #endif
    00222
    00224
    00225 #endif // _IPC_DMA_H_
    00226