=methodology+++++++++++++++++++++++++++++++++++++++++++++++++++
rtl_handoff
*
GuideWare Reference Methodology for rtl_handoff stage of New RTL Block development
*
The rtl_handoff goals are a super-set of the initial_rtl goals. This stage 
contains the complete set of recommended RTL Handoff checks. Handoff is 
assumed to be the hand-off from the RTL design team to the post-synthesis 
implementation team or hand-off to System Integration (sub-system or SoC)
integration. Since the hand-off process is typically iterative, it is not
necessarily expected that all goals will be clean at the first hand-off, but 
at least the issues will be known and can be communicated to the consumers 
downstream.

In addition to commonly applicable templates at above design stage,
this methodology also includes a set of Optional templates. Design
teams should inspect these templates for applicability to their design.

GuideWare Methodology Guide provides detailed description of above
templates, as well as what factors should be reviewed when selecting
optional templates.
=cut++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

!HIDE lint/lint_rtl*
!HIDE lint/lint_turbo_rtl*
!HIDE lint/design_audit*
!HIDE lint/lint_abstract*
!HIDE adv_lint/adv_lint_setup*
!HIDE adv_lint/adv_lint_struct*
!HIDE adv_lint/adv_lint_verify*
!HIDE adv_lint/lint_functional_rtl*
!HIDE constraints/sdc_gen*
!HIDE constraints/sdc_audit*
!HIDE constraints/sdc_check*
!HIDE constraints/sdc_exception_struct* PREREQ: constraints/sdc_check
!HIDE constraints/sdc_hier_equiv*
!HIDE constraints/sdc_redundancy*
!HIDE constraints/sdc_equiv*
!HIDE constraints/sdc_abstract*
!HIDE txv_verification/fp_verification*
!HIDE txv_verification/mcp_verification*
!HIDE txv_verification/fp_mcp_verification*
!HIDE txv_verification/txv_run_audit*
!HIDE txv_verification/txv_glitch*
!HIDE txv_verification/txv_rtl_gen*
!HIDE txv_verification/txv_sdc_migration*
!HIDE cdc/cdc_setup*
!HIDE cdc/cdc_setup_check*
!HIDE cdc/clock_reset_integrity*
!HIDE cdc/cdc_verify_struct* 
!HIDE cdc/cdc_verify*   PREREQ: cdc/cdc_verify_struct
!HIDE cdc/cdc_abstract* PREREQ: cdc/cdc_verify
!HIDE dft/dft_setup*
!HIDE dft/dft_scan_ready*
!HIDE dft/dft_best_practice*
!HIDE dft/dft_test_points*
!HIDE dft/dft_dsm_clocks*
!HIDE dft/dft_dsm_best_practice*
!HIDE dft/dft_abstract*
power/power_audit*
power/power_activity_check*
!HIDE power/power_gen_pesd*
!HIDE power/power_calibration*
power/power_est_average*
!HIDE power/power_est_profiling*
!HIDE power/power_reduction_adv*
!HIDE power/power_mem_reduction*
!HIDE power/power_guidance*
!HIDE power/power_selective_autofix*
!HIDE power/power_sec* DDR_GOAL
!HIDE power_verification/power_verif_audit*
!HIDE power_verification/power_verif_noninstr*
!HIDE power_verification/power_verif_instr_rtl*
!HIDE power_verification/power_verif_abstract*
!HIDE physical/lint_physical*
!HIDE physical/physical_analysis_signoff*
!HIDE physical/physical_analysis_congestion*


!HIDE physical_aware_power/physical_power_postfloorplan*
!HIDE physical_aware_power/power_est_average*
