/space/home/slher/rel/Beken/v6_4_5/macsw/ip/lmac/src/hal/hal_desc.h File Reference

File containing the definition of HW descriptors. More...

#include "co_int.h"
#include "mac.h"
#include "mac_frame.h"
#include "dma.h"
#include "co_math.h"
#include "co_list.h"
#include "phy.h"
#include "dbg.h"

Go to the source code of this file.

Data Structures

struct machdr

MAC header content as defined in the MAC HW User Manual transmit MPDU template. More...

struct tx_policy_tbl

Policy Table Structure used to store Policy Table Information used by MAC HW to prepare transmit vector to used by PHY. More...

struct tx_compressed_policy_tbl

Compressed Policy Table Structure used to store Policy Table Information used by MAC HW to get TX information for secondary users in case of MU-MIMO PPDU transmission. More...

struct tx_hd

Definition of a TX header descriptor. More...

struct tx_pbd

Definition of a TX payload buffer descriptor. More...

struct tx_dmadesc

Definition of a TX DMA descriptor. More...

struct rx_vector_1

Structure for receive Vector 1. More...

struct rx_vector_2

Structure for receive Vector 2. More...

struct rx_hd

Element in the pool of RX header descriptor. More...

struct rx_pbd

Element in the pool of rx payload buffer descriptors. More...

struct rx_dmadesc

Definition of a Rx DMA header descriptor. More...

struct rx_payloaddesc

Definition of a Rx DMA payload descriptor. More...

struct tx_cfm_tag

Structure indicating the status and other information about the transmission. More...

struct tx_hw_desc

Definition of a TX confirmation descriptor. More...

struct debug_info_tag

Control structure used for the debug information dump. More...

Defines

#define RADAR_PULSE_MAX 4

Number of pulses in a radar event structure.

#define RADAR_EVENT_MAX 10

Number of radar event structures.

#define UNSUP_RX_VECT_MAX 8

Number of rx vectors of unsupported frames.

#define TX_HEADER_DESC_PATTERN 0xCAFEBABE

uPattern for TX header descriptor.

#define TX_PAYLOAD_DESC_PATTERN 0xCAFEFADE

uPattern for TX buffer descriptor

#define RX_HEADER_DESC_PATTERN 0xBAADF00D

uPattern for RX header descriptor.

#define RX_PAYLOAD_DESC_PATTERN 0xC0DEDBAD

uPattern for RX payload descriptor.

#define TBD_DONE_HW CO_BIT(31)

Flag indicating if HW handled the buffer.

#define TBD_INTERRUPT_EN CO_BIT(0)

Bit allowing to request HW to generate an interrupt upon a payload buffer transmission.

#define SOUNDING_TX_BIT CO_BIT(0)

Sounding of PPDU Frame Transmission (Bit 0).

#define SMOOTHING_TX_BIT CO_BIT(1)

Smoothing for PPDU frames (Bit 1).

#define SMOOTHING_PROT_TX_BIT CO_BIT(2)

Smoothing for Control frames (Bit 2).

#define USE_BW_SIG_TX_BIT CO_BIT(3)

Use BW signaling bit.

#define DYN_BW_TX_BIT CO_BIT(4)

Dynamic BW.

#define DOZE_ALLOWED_TX_BIT CO_BIT(5)

Doze allowed by AP during TXOP.

#define CONT_TX_BIT CO_BIT(6)

Continuous transmit.

#define USER_POS_OFT 12

User Position field offset.

#define USER_POS_MASK (0x3 << USER_POS_OFT)

User Position field mask.

#define USE_RIFS_TX_BIT CO_BIT(14)

Use RIFS for Transmission (Bit 14).

#define USE_MUMIMO_TX_BIT CO_BIT(15)

Use MU-MIMO for Transmission (Bit 15).

#define GID_TX_OFT 16

GroupId field offset.

#define GID_TX_MASK (0x3F << GID_TX_OFT)

GroupId field mask.

#define PAID_TX_OFT 22

Partial AID field offset.

#define PAID_TX_MASK (0x1FF << PAID_TX_OFT)

Partial AID field mask.

#define PROT_FRM_DURATION_OFT 16

Protection Frame Duration offset.

#define PROT_FRM_DURATION_MSK (0xFFFF << PROT_FRM_DURATION_OFT)

Protection Frame Duration mask.

#define WRITE_ACK CO_BIT(14)

Set if ACK has to be passed to SW.

#define LOW_RATE_RETRY CO_BIT(13)

Set if lower rates have to be used for retries.

#define LSTP_PROT CO_BIT(12)

L-SIG TXOP Protection for protection frame.

#define LSTP CO_BIT(11)

L-SIG TXOP Protection.

#define EXPECTED_ACK_OFT 9

Expected Acknowledgment offset.

#define EXPECTED_ACK_MSK (0x3 << EXPECTED_ACK_OFT)

Expected Acknowledgment mask.

#define EXPECTED_ACK_NO_ACK (0x0 << EXPECTED_ACK_OFT)

No acknowledgment.

#define EXPECTED_ACK_NORMAL_ACK (0x1 << EXPECTED_ACK_OFT)

Normal acknowledgment.

#define EXPECTED_ACK_BLOCK_ACK (0x2 << EXPECTED_ACK_OFT)

Uncompressed block acknowledgment.

#define EXPECTED_ACK_COMPRESSED_BLOCK_ACK (0x3 << EXPECTED_ACK_OFT)

Compressed block acknowledgment.

#define TS_VALID_BIT CO_BIT(0)

Type and Subtype fields Valid bit.

#define FRM_TYPE_OFT 1

Type field offset.

#define FRM_TYPE_MSK (0x3<<FRM_TYPE_OFT)

Type field mask.

#define FRM_TYPE_MNG (0<<FRM_TYPE_OFT)

Management type.

#define FRM_TYPE_CNTL (1<<FRM_TYPE_OFT)

Control type.

#define FRM_TYPE_DATA (2<<FRM_TYPE_OFT)

Data type.

#define FRM_SUBTYPE_OFT 3

Subtype field offset.

#define FRM_SUBTYPE_MSK (0xF<<FRM_SUBTYPE_OFT)

Subtype field mask.

#define FRM_CNTL_SUBTYPE_BAR (8<<FRM_SUBTYPE_OFT)

BAR subtype.

#define FRM_CNTL_SUBTYPE_BA (9<<FRM_SUBTYPE_OFT)

BA subtype.

#define INTERRUPT_EN_TX CO_BIT(8)

Bit indicating if an interrupt has to be set or not once packet is transmitted.

#define NB_BLANK_DELIM_OFT 9

Offset of Number of Blank delimiters.

#define NB_BLANK_DELIM_MSK (0x3FF << NB_BLANK_DELIM_OFT)

Mask of Number of Blank delimiters.

#define WHICHDESC_OFT 19

WhichDescriptor definition - contains aMPDU bit and position value Offset of WhichDescriptor field in the MAC CONTROL INFO 2 word.

#define WHICHDESC_MSK (0x07 << WHICHDESC_OFT)

Mask of the WhichDescriptor field.

#define WHICHDESC_UNFRAGMENTED_MSDU (0x00 << WHICHDESC_OFT)

Only 1 THD possible, describing an unfragmented MSDU.

#define WHICHDESC_FRAGMENTED_MSDU_FIRST (0x01 << WHICHDESC_OFT)

THD describing the first MPDU of a fragmented MSDU.

#define WHICHDESC_FRAGMENTED_MSDU_INT (0x02 << WHICHDESC_OFT)

THD describing intermediate MPDUs of a fragmented MSDU.

#define WHICHDESC_FRAGMENTED_MSDU_LAST (0x03 << WHICHDESC_OFT)

THD describing the last MPDU of a fragmented MSDU.

#define WHICHDESC_AMPDU_EXTRA (0x04 << WHICHDESC_OFT)

THD for extra descriptor starting an AMPDU.

#define WHICHDESC_AMPDU_FIRST (0x05 << WHICHDESC_OFT)

THD describing the first MPDU of an A-MPDU.

#define WHICHDESC_AMPDU_INT (0x06 << WHICHDESC_OFT)

THD describing intermediate MPDUs of an A-MPDU.

#define WHICHDESC_AMPDU_LAST (0x07 << WHICHDESC_OFT)

THD describing the last MPDU of an A-MPDU.

#define AMPDU_OFT 21

aMPDU bit offset

#define AMPDU_BIT CO_BIT(AMPDU_OFT)

aMPDU bit

#define UNDER_BA_SETUP_BIT CO_BIT(22)

Under BA setup bit.

#define DONT_TOUCH_DUR CO_BIT(28)

Don't touch duration bit.

#define NUM_RTS_RETRIES_OFT 0

Number of RTS frame retries offset.

#define NUM_RTS_RETRIES_MSK (0xFF << NUM_RTS_RETRIES_OFT)

Number of RTS frame retries mask.

#define NUM_MPDU_RETRIES_OFT 8

Number of MPDU frame retries offset.

#define NUM_MPDU_RETRIES_MSK (0xFF << NUM_MPDU_RETRIES_OFT)

Number of MPDU frame retries mask.

#define RETRY_LIMIT_REACHED_BIT CO_BIT(16)

Retry limit reached: frame unsuccessful.

#define LIFETIME_EXPIRED_BIT CO_BIT(17)

Frame lifetime expired: frame unsuccessful.

#define BA_FRAME_RECEIVED_BIT CO_BIT(18)

BA frame not received - valid only for MPDUs part of AMPDU.

#define HE_TB_TX_BIT CO_BIT(22)

Frame was transmitted in a HE TB PPDU - Set by SW.

#define FRAME_SUCCESSFUL_TX_BIT CO_BIT(23)

Frame successful by TX DMA: Ack received successfully.

#define A_MPDU_LAST (0x0F << 26)

Last MPDU of an A-MPDU.

#define BW_TX_OFT 24

Transmission bandwidth offset.

#define BW_TX_MSK (0x3 << BW_TX_OFT)

Transmission bandwidth mask.

#define BW_20MHZ_TX (0x0 << BW_TX_OFT)

Transmission bandwidth - 20MHz.

#define BW_40MHZ_TX (0x1 << BW_TX_OFT)

Transmission bandwidth - 40MHz.

#define BW_80MHZ_TX (0x2 << BW_TX_OFT)

Transmission bandwidth - 80MHz.

#define BW_160MHZ_TX (0x3 << BW_TX_OFT)

Transmission bandwidth - 160MHz.

#define DESC_DONE_TX_BIT CO_BIT(31)

Descriptor done bit: Set by HW for TX DMA.

#define DESC_DONE_SW_TX_BIT CO_BIT(30)

Descriptor done bit: Set by SW for TX DMA.

#define RXL_HWDESC_RXV_LEN 40

Length of the receive vectors.

Policy table definitions

#define RATE_CONTROL_STEPS 4

Number of rate control steps in the policy table.

#define POLICY_TABLE_PATTERN 0xBADCAB1E

uPattern for Policy Table

#define BF_FORM_EXT_PT_OFT 3

Beam Forming Frame Exchange offset.

#define BF_FORM_EXT_PT_MASK (0x1 << BF_FORM_EXT_PT_OFT)

Beam Forming Frame Exchange mask.

#define NO_EXTN_SS_PT_OFT 4

Number of Extension Spatial Streams offset.

#define NO_EXTN_SS_PT_MASK (0x3 << NO_EXTN_SS_PT_OFT)

Number of Extension Spatial Streams mask.

#define FEC_CODING_PT_OFT 6

FEC Coding offset.

#define FEC_CODING_PT_BIT CO_BIT(FEC_CODING_PT_OFT)

FEC Coding bit.

#define STBC_PT_OFT 7

Space Time Block Coding offset.

#define STBC_PT_MASK (0x3 << STBC_PT_OFT)

Space Time Block Coding mask.

#define NX_TX_PT_OFT 14

Number of Transmit Chains for PPDU offset.

#define NX_TX_PT_MASK (0x7 << NX_TX_PT_OFT)

Number of Transmit Chains for PPDU mask.

#define NX_TX_PROT_PT_OFT 17

Number of Transmit Chains for Protection Frame offset.

#define NX_TX_PROT_PT_MASK (0x7 << NX_TX_PROT_PT_OFT)

Number of Transmit Chains for Protection Frame mask.

#define DOPPLER_OFT 20

Doppler offset.

#define DOPPLER_BIT CO_BIT(DOPPLER_OFT)

Doppler bit.

#define SPATIAL_REUSE_OFT 24

Spatial reuse offset.

#define SPATIAL_REUSE_MASK (0xF << SPATIAL_REUSE_OFT)

Spatial reuse mask.

#define ANTENNA_SET_PT_OFT 0

Antenna Set offset.

#define ANTENNA_SET_PT_MASK 0XFF

Antenna Set mask.

#define SMM_INDEX_PT_OFT 8

Spatial Map Matrix Index offset.

#define SMM_INDEX_PT_MASK (0XFF << SMM_INDEX_PT_OFT)

Spatial Map Matrix Index mask.

#define BMFED_OFT 16

Beamformed Offset.

#define BMFED_BIT CO_BIT(BMFED_OFT)

Beamformed Bit.

#define BMCHANGE_OFT 17

Beam Change Offset.

#define BMCHANGE_BIT CO_BIT(BMCHANGE_OFT)

Beam Change Bit.

#define UPLINK_FLAG_OFT 18

Uplink Flag Offset.

#define UPLINK_FLAG_BIT CO_BIT(UPLINK_FLAG_OFT)

Uplink Flag Bit.

#define BSS_COLOR_OFT 20

BSS Color offset.

#define BSS_COLOR_MASK (0X3F << BSS_COLOR_OFT)

BSS Color mask.

#define PKT_EXTENSION_OFT 26

Packet Extension offset.

#define PKT_EXTENSION_MASK (0X07 << PKT_EXTENSION_OFT)

Packet Extension mask.

#define KEYSRAM_INDEX_OFT 0

Key Storage RAM Index offset.

#define KEYSRAM_INDEX_MASK (0X3FF << KEYSRAM_INDEX_OFT)

Key Storage RAM Index mask.

#define KEYSRAM_INDEX_RA_OFT 10

Key Storage RAM Index for Receiver Address offset.

#define KEYSRAM_INDEX_RA_MASK (0X3FF << KEYSRAM_INDEX_RA_OFT)

Key Storage RAM Index for Receiver Address mask.

#define LONG_RETRY_LIMIT_OFT 0

dot11LongRetryLimit MIB Value offset

#define LONG_RETRY_LIMIT_MASK (0XFF << LONG_RETRY_LIMIT_OFT)

dot11LongRetryLimit MIB Value mask

#define SHORT_RETRY_LIMIT_OFT 8

dot11ShortRetryLimit MIB Value offset

#define SHORT_RETRY_LIMIT_MASK (0XFF << SHORT_RETRY_LIMIT_OFT)

dot11ShortRetryLimit MIB Value mask

#define RTS_THRSHOLD_OFT 16

dot11RtsThrshold MIB Value offset

#define RTS_THRSHOLD_MASK (0XFF << RTS_THRSHOLD_OFT)

dot11RtsThrshold MIB Value mask

#define MCS_INDEX_TX_RCX_OFT 0

MCS Index offset.

#define MCS_INDEX_TX_RCX_MASK (0X7F << MCS_INDEX_TX_RCX_OFT)

MCS Index mask.

#define BW_TX_RCX_OFT 7

Bandwidth for transmission offset.

#define BW_TX_RCX_MASK (0X3 << BW_TX_RCX_OFT)

Bandwidth for transmission mask.

#define SHORT_GI_TX_RCX_OFT 9

Short Guard Interval for Transmission offset.

#define SHORT_GI_TX_RCX_MASK (0x1 << SHORT_GI_TX_RCX_OFT)

Short Guard Interval for Transmission mask.

#define PRE_TYPE_TX_RCX_OFT 10

Preamble type for 11b Transmission offset.

#define PRE_TYPE_TX_RCX_MASK (0x1 << PRE_TYPE_TX_RCX_OFT)

Preamble type for 11b Transmission mask.

#define HE_GI_TYPE_TX_RCX_OFT 9

Guard Interval/Preamble type for Transmission offset.

#define HE_GI_TYPE_TX_RCX_MASK (0x3 << HE_GI_TYPE_TX_RCX_OFT)

Guard Interval/Preamble for Transmission mask.

#define GI_TYPE_0_8 (0x0 << HE_GI_TYPE_TX_RCX_OFT)

HE 0.8us GI.

#define GI_TYPE_1_6 (0x1 << HE_GI_TYPE_TX_RCX_OFT)

HE 1.6us GI.

#define GI_TYPE_3_2 (0x2 << HE_GI_TYPE_TX_RCX_OFT)

HE 3.2us GI.

#define FORMAT_MOD_TX_RCX_OFT 11

Format of the modulation offset.

#define FORMAT_MOD_TX_RCX_MASK (0X7 << FORMAT_MOD_TX_RCX_OFT)

Format of the modulation mask.

#define PROT_FRM_EX_RCX_OFT 14

Type of NAV protection frame exchange offset.

#define PROT_FRM_EX_RCX_MASK (0X7 << PROT_FRM_EX_RCX_OFT)

Type of NAV protection frame exchange mask.

#define PROT_NO_PROT (0x0 << PROT_FRM_EX_RCX_OFT)

No protection.

#define PROT_SELF_CTS (0x1 << PROT_FRM_EX_RCX_OFT)

Self-CTS.

#define PROT_RTS_CTS (0x2 << PROT_FRM_EX_RCX_OFT)

RTS-CTS with intended receiver.

#define PROT_RTS_CTS_WITH_QAP (0x3 << PROT_FRM_EX_RCX_OFT)

RTS-CTS with QAP.

#define PROT_STBC (0x4 << PROT_FRM_EX_RCX_OFT)

STBC protection.

#define MCS_INDEX_PROT_TX_RCX_OFT 17

MCS Index for protection frame offset.

#define MCS_INDEX_PROT_TX_RCX_MASK (0x7F << MCS_INDEX_PROT_TX_RCX_OFT)

MCS Index for protection frame mask.

#define BW_PROT_TX_RCX_OFT 24

Bandwidth for protection frame transmission offset.

#define BW_PROT_TX_RCX_MASK (0x3 << BW_PROT_TX_RCX_OFT)

Bandwidth for protection frame transmission mask.

#define FORMAT_MOD_PROT_TX_RCX_OFT 26

Format of the modulation for the protection frame offset.

#define FORMAT_MOD_PROT_TX_RCX_MASK (0x7 << FORMAT_MOD_PROT_TX_RCX_OFT)

Format of the modulation for the protection frame mask.

#define N_RETRY_RCX_OFT 29

Number of retries at this rate offset.

#define N_RETRY_RCX_MASK (0x7 << N_RETRY_RCX_OFT)

Number of retries at this rate mask.

#define FORMATMOD_NON_HT 0

Non-HT format.

#define FORMATMOD_NON_HT_DUP_OFDM 1

Non-HT duplicate OFDM format.

#define FORMATMOD_HT_MF 2

HT mixed mode format.

#define FORMATMOD_HT_GF 3

HT greenfield format.

#define FORMATMOD_VHT 4

VHT format.

#define FORMATMOD_HE_SU 5

HE-SU format.

#define FORMATMOD_HE_MU 6

HE-MU format.

#define FORMATMOD_HE_ER 7

HE-ER format.

#define BW_20MHZ 0

20 MHz bandwidth

#define BW_40MHZ 1

40 MHz bandwidth

#define BW_80MHZ 2

80 MHz bandwidth

#define BW_160MHZ 3

160 or 80+80 MHz bandwidth

#define VHT_NSS_OFT 4

VHT Nss offset.

#define VHT_NSS_MASK (0x7 << VHT_NSS_OFT)

VHT Nss mask.

#define VHT_MCS_OFT 0

VHT MCS offset.

#define VHT_MCS_MASK (0xF << VHT_MCS_OFT)

VHT MCS mask.

#define HT_NSS_OFT 3

Offset of the NSS in a HT MCS value (valid for MCS <= 31).

#define HT_NSS_MASK (0x3 << HT_NSS_OFT)

Mask of the NSS in a HT MCS value (valid for MCS <= 31).

#define HT_MCS_OFT 0

Offset of the MCS in a HT MCS value (valid for MCS <= 31).

#define HT_MCS_MASK (0x7 << HT_MCS_OFT)

Mask of the MCS in a HT MCS value (valid for MCS <= 31).

#define TX_PWR_LEVEL_PT_RCX_OFT 0

Transmit Power Level for RCX offset.

#define TX_PWR_LEVEL_PT_RCX_MASK (0xff << TX_PWR_LEVEL_PT_RCX_OFT)

Transmit Power Level for RCX mask.

#define TX_PWR_LEVEL_PROT_PT_RCX_OFT 8

Transmit Power Level of Protection for RCX offset.

#define TX_PWR_LEVEL_PROT_PT_RCX_MASK (0xff << TX_PWR_LEVEL_PROT_PT_RCX_OFT)

Transmit Power Level of Protection for RCX mask.

#define TX_PWR_LEVEL_MASK (TX_PWR_LEVEL_PT_RCX_MASK | TX_PWR_LEVEL_PROT_PT_RCX_MASK)

Transmit Power Level mask.

#define TX_PWR_LEVEL_SET(pwr)

Macro used to compute both the Protection and Data power indexes.

#define TX_HE_LTF_TYPE_PT_RCX_OFT 16

HE LTF type for RCX offset.

#define TX_HE_LTF_TYPE_PT_RCX_MASK (0x03 << TX_HE_LTF_TYPE_PT_RCX_OFT)

HE LTF type for RCX mask.

#define TX_1x_HE_LTF_FOR_3_2_US (0x00 << TX_HE_LTF_TYPE_PT_RCX_OFT)

1x HE-LTF for 3.2 µs

#define TX_2x_HE_LTF_FOR_6_4_US (0x01 << TX_HE_LTF_TYPE_PT_RCX_OFT)

2x HE-LTF for 6.4 µs

#define TX_4x_HE_LTF_FOR_12_8_US (0x02 << TX_HE_LTF_TYPE_PT_RCX_OFT)

4x HE-LTF for 12.8 µs

#define TX_HE_DCM_OFT 18

DCM bit offset.

#define TX_HE_DCM_BIT CO_BIT(TX_HE_DCM_OFT)

DCM Bit.

Compressed Policy table definitions

#define MCS_IDX_TX_CPT_OFT 0

MCS index offset.

#define MCS_IDX_TX_CPT_MASK (0x7F << MCS_IDX_TX_CPT_OFT)

MCS index mask.

#define FEC_CODING_CPT_OFT 7

FEC Coding offset.

#define FEC_CODING_CPT_BIT CO_BIT(FEC_CODING_CPT_OFT)

FEC Coding bit.

#define SMM_INDEX_CPT_OFT 8

Spatial Map Matrix Index offset.

#define SMM_INDEX_CPT_MASK (0XFF << SMM_INDEX_CPT_OFT)

Spatial Map Matrix Index mask.

#define KEYSRAM_INDEX_CPT_OFT 16

Key Storage RAM Index offset.

#define KEYSRAM_INDEX_CPT_MASK (0X3FF << KEYSRAM_INDEX_OFT)

Key Storage RAM Index mask.

RHD STATINFO

#define KEY_IDX_OFT 15

Key index offset.

#define KEY_IDX_MSK (0x3FF << KEY_IDX_OFT)

Key index mask.

#define KEY_IDX_VALID_BIT CO_BIT(25)

Key index valid bit.

#define IMM_RSP_AC_OFT 11

Immediate response access category offset.

#define IMM_RSP_AC_MSK (0x03 << IMM_RSP_AC_OFT)

Immediate response access category mask.

#define RX_PD_LASTBUF 0x0001

Last buffer of the MPDU.

#define RX_PD_DONE 0x0002

Descriptor Done in HW.

#define RX_HD_KEYIDV 0x02000000

Storage RAM key index valid bit.

#define RX_HD_KEYID 0x01FF8000

Storage RAM key index.

#define RX_HD_KEYID_LSB 15

Lowest significant bit of the storage RAM key index.

#define RX_HD_DONE 0x00004000

Done bit.

#define RX_HD_SUCCESS 0x00002000

Frame successfully received bit.

#define RX_HD_GA_FRAME 0x00000400

Group Addressed frame bit.

#define RX_HD_ADDRMIS 0x00000200

Address mismatch bit.

#define RX_HD_FCSERR 0x0100

FCS error bit.

#define RX_HD_PHY_ERR 0x00000080

PHY error bit.

#define RX_HD_UNDEF_ERR 0x00000040

Undefined error bit.

#define RX_HD_DECRSTATUS 0x0000001C

Decryption status mask.

#define RX_HD_DECR_UNENC 0x0000

Frame unencrypted.

#define RX_HD_DECR_WEP_SUCCESS 0x0014

MAC security type WEP.

#define RX_HD_DECR_TKIP_SUCCESS 0x0018

MAC security type TKIP.

#define RX_HD_DECR_CCMP128_SUCCESS 0x001C

MAC security type CCMP.

#define RX_HD_RSP_FRM 0x00000002

Is response frame bit.

#define RX_HD_RXVEC2V 0x00000001

Vector 2 valid bit.

#define RX_HD_KEYID_GET(__s) (((__s) & RX_HD_KEYID) >> RX_HD_KEYID_LSB)

Macro to retrieve the storage RAM key index for the received frame.

#define RX_HD_DONE_GET(__s) ((__s) & RX_HD_DONE)

Macro to retrieve the done bit of the received frame.

#define RX_HD_SUCCESS_GET(__s) ((__s) & (RX_HD_SUCCESS | RX_HD_FCSERR))

Macro to retrieve the success bit of the received frame.

RX VECTOR related definitions.

#define RXVEC1_NUM_REG 4

Number of 32 bits registers forming the RX vector.

#define RXVEC_LEGRATE(__x) (((__x) & 0x0000F000) >> 12)

Macro retrieving the legacy rate of the RX vector.

#define RXVEC_HTLENGTH_0(__x) (((__x) & 0xFFFF0000) >> 16)

Macro retrieving the HT length [15:0] of the RX vector.

#define RXVEC_HTLENGTH_1(__x) (((__x) & 0x0000000F))

Macro retrieving the HT length [19:16] of the RX vector.

#define RXVEC_PRETYPE(__x) (((__x) & 0x00008000) >> 15)

Macro retrieving the preamble type of the RX vector.

#define RXVEC_FORMATMOD(__x) (((__x) & 0x00070000) >> 16)

Macro retrieving the modulation format of the RX vector.

#define RXVEC_RSSI1(__x) (((__x) & 0xFF000000) >> 24)

Macro retrieving the 1st chain RSSI of the RX vector.

#define RXVEC_RSSI2(__x) (((__x) & 0x000000FF))

Macro retrieving the 2nd chain RSSI of the RX vector.

AMPDU Status Information related definitions.

Macro retrieving the A-MPDU counter

Parameters:

[in] __x AMPDU Status Information value.

#define RX_AMPDU_AMPDUCNT(__x) (((__x) & 0xC000) >> 14)

Macro retrieving the MPDU Counter inside the A-MPDU.

#define RX_AMPDU_MPDUCNT(__x) ((__x) & 0x3F00)

Macro retrieving the MPDU Counter inside the A-MPDU.

Enumerations

enum {
HW_RATE_1MBPS = 0, HW_RATE_2MBPS, HW_RATE_5_5MBPS, HW_RATE_11MBPS,
HW_RATE_6MBPS, HW_RATE_9MBPS, HW_RATE_12MBPS, HW_RATE_18MBPS,
HW_RATE_24MBPS, HW_RATE_36MBPS, HW_RATE_48MBPS, HW_RATE_54MBPS
}

legacy RATE definitions

More...

Functions

__INLINE int8_t hal_desc_get_rssi (struct rx_vector_1 *rx_vec_1, int8_t *rx_rssi)

Retrieve the RSSI values from the RX vector.

__INLINE uint16_t hal_desc_get_ht_length (struct rx_vector_1 *rx_vec_1)

Retrieve the length of the HT PPDU from the RX vector.

__INLINE uint8_t hal_desc_get_rx_format (struct rx_vector_1 *rx_vec_1)

Retrieve the modulation format from the RX vector.

__INLINE uint8_t hal_desc_get_preamble_type (struct rx_vector_1 *rx_vec_1)

Retrieve the preamble type (short/long) of the RX vector.

__INLINE uint8_t hal_desc_get_legacy_rate (struct rx_vector_1 *rx_vec_1)

Retrieve Legacy Rate of the PPDU from the RX vector.

Variables

struct dma_desc bcn_dwnld_desc

IPC DMA control structure for beacon download.

struct tx_hw_desc tx_hw_desc0 [RW_USER_MAX *NX_TXDESC_CNT0]

Array of HW descriptors for BK queue.

struct tx_hw_desc tx_hw_desc1 [RW_USER_MAX *NX_TXDESC_CNT1]

Array of HW descriptors for BE queue.

struct tx_hw_desc tx_hw_desc2 [RW_USER_MAX *NX_TXDESC_CNT2]

Array of HW descriptors for VI queue.

struct tx_hw_desc tx_hw_desc3 [RW_USER_MAX *NX_TXDESC_CNT3]

Array of HW descriptors for VO queue.

struct tx_hw_desc tx_hw_desc4 [NX_TXDESC_CNT4]

Array of HW descriptors for BCN queue.

Detailed Description

File containing the definition of HW descriptors.

File containing the definition of the structure and API function used to initialise the pool.

Definition in file hal_desc.h.