Ceva-RW WLAN FullMAC SW documentation: /space/home/slher/rel/Beken/v6_4_5/macsw/ip/umac/src/rxu/rxu

00001 
00016 #ifndef _RXU_CNTRL_H_
00017 #define _RXU_CNTRL_H_
00018 
00028 /*
00029  * INCLUDE FILES
00030  ****************************************************************************************
00031  */
00032 
00033 #include "rwnx_config.h"
00034 #include "co_int.h"
00035 #include "co_bool.h"
00036 #include "co_status.h"
00037 #include "mac.h"
00038 #include "mac_frame.h"
00039 #include "mm_timer.h"
00040 #include "me_mic.h"
00041 #include "dma.h"
00042 #include "llc.h"
00043 #include "rxl_cntrl.h"
00044 
00045 /*
00046  * DEFINES
00047  ****************************************************************************************
00048  */
00049 
00051 #define RX_CNTRL_DEFRAG_POOL_SIZE       (3)
00053 #define RX_CNTRL_DEFRAG_MAX_WAIT        (100000)
00054 
00055 #if (NX_REORD)
00057 #define RX_CNTRL_REORD_POOL_SIZE        (NX_REORD)
00059 #define RX_CNTRL_REORD_WIN_SIZE         (NX_REORD_BUF_SIZE)
00061 #define RX_CNTRL_REORD_MAX_WAIT         (50000)
00062 #endif //(NX_REORD)
00063 
00065 #define RX_MIN_STAT_DESC_CNT (NX_RXDESC_CNT + 2)
00067 #if NX_REORD && ((2 * NX_REORD_BUF_SIZE) > RX_MIN_STAT_DESC_CNT)
00068 #define RX_STAT_DESC_CNT      (2 * NX_REORD_BUF_SIZE)
00069 #else
00070 #define RX_STAT_DESC_CNT      RX_MIN_STAT_DESC_CNT
00071 #endif
00072 
00074 #define RX_MAX_AMSDU_SUBFRAME_LEN (LLC_ETHER_MTU + LLC_ETHER_HDR_LEN + LLC_802_2_HDR_LEN)
00075 
00076 /*
00077  * ENUMERATIONS
00078  ****************************************************************************************
00079  */
00080 
00082 enum rx_status_bits
00083 {
00085     RX_STAT_FORWARD = CO_BIT(0),
00087     RX_STAT_ALLOC = CO_BIT(1),
00089     RX_STAT_DELETE = CO_BIT(2),
00091     RX_STAT_LEN_UPDATE = CO_BIT(3),
00093     RX_STAT_ETH_LEN_UPDATE = CO_BIT(4),
00095     RX_STAT_COPY = CO_BIT(5),
00097     RX_STAT_SPURIOUS = CO_BIT(6),
00099     RX_STAT_MONITOR = CO_BIT(7),
00101     RX_STAT_UF = CO_BIT(8),
00102 };
00103 
00105 #define RX_FLAGS_IS_AMSDU_BIT         CO_BIT(0)
00107 #define RX_FLAGS_IS_MPDU_BIT          CO_BIT(1)
00109 #define RX_FLAGS_4_ADDR_BIT           CO_BIT(2)
00111 #define RX_FLAGS_NEW_MESH_PEER_BIT    CO_BIT(3)
00113 #define RX_FLAGS_NON_MSDU_MSK        (RX_FLAGS_IS_AMSDU_BIT | RX_FLAGS_IS_MPDU_BIT |     \
00114                                       RX_FLAGS_4_ADDR_BIT | RX_FLAGS_NEW_MESH_PEER_BIT)
00116 #define RX_FLAGS_USER_PRIO_INDEX_OFT 4
00118 #define RX_FLAGS_USER_PRIO_INDEX_MSK (0x7 << RX_FLAGS_USER_PRIO_INDEX_OFT)
00120 #define RX_FLAGS_VIF_INDEX_OFT  8
00122 #define RX_FLAGS_VIF_INDEX_MSK  (0xFF << RX_FLAGS_VIF_INDEX_OFT)
00124 #define RX_FLAGS_STA_INDEX_OFT  16
00126 #define RX_FLAGS_STA_INDEX_MSK  (0xFF << RX_FLAGS_STA_INDEX_OFT)
00128 #define RX_FLAGS_DST_INDEX_OFT  24
00130 #define RX_FLAGS_DST_INDEX_MSK  (0xFF << RX_FLAGS_DST_INDEX_OFT)
00131 
00133 enum rxu_cntrl_frame_info_pos
00134 {
00136     RXU_CNTRL_MIC_CHECK_NEEDED = CO_BIT(0),
00138     RXU_CNTRL_PN_CHECK_NEEDED = CO_BIT(1),
00140     RXU_CNTRL_NEW_MESH_PEER   = CO_BIT(2),
00142     RXU_CNTRL_GROUP_ADDRESSED = CO_BIT(3),
00143 };
00144 
00145 
00146 /*
00147  * TYPE and STRUCT DEFINITIONS
00148  ****************************************************************************************
00149  */
00150 // forward declarations
00151 struct rxdesc;
00152 struct rx_dmadesc;
00153 struct vif_info_tag;
00154 
00156 struct rxu_mic_calc
00157 {
00159     struct mic_calc mic_calc;
00161     uint32_t last_bytes[2];
00162 };
00163 
00164 
00166 struct rxu_cntrl_defrag
00167 {
00169     struct co_list_hdr list_hdr;
00170 
00172     bool all_rcv;
00174     bool eth_len_present;
00176     uint8_t sta_idx;
00178     uint8_t tid;
00180     uint8_t next_fn;
00182     uint8_t mac_hdr_len;
00184     uint16_t sn;
00186     uint16_t frame_len;
00188     uint32_t dma_addr;
00190     uint32_t host_id;
00192     uint32_t time;
00194     struct rxu_mic_calc mic;
00196     struct mm_timer_tag timer;
00197 };
00198 
00199 #if (NX_REORD)
00201 struct rxu_cntrl_reord_elt
00202 {
00204     uint64_t pn;
00206     uint32_t host_id;
00208     bool pn_check;
00209 };
00210 
00212 struct rxu_cntrl_reord
00213 {
00215     struct co_list_hdr list_hdr;
00216 
00218     uint32_t sn_rx_time;
00220     struct key_info_tag *key;
00225     uint16_t win_start;
00227     uint8_t rx_status_pos;
00229     uint8_t ooo_pkt_cnt;
00231     uint8_t tid;
00233     struct rxu_cntrl_reord_elt elt[RX_CNTRL_REORD_WIN_SIZE];
00235     struct mm_timer_tag timer;
00237     bool active;
00238 };
00239 #endif //(NX_REORD)
00240 
00242 struct rx_cntrl_rx_status
00243 {
00245     uint16_t frame_cntl;
00247     uint16_t seq_cntl;
00248     #if (RW_MESH_EN)
00250     uint32_t a_qos_ctrl;
00251     #endif //(RW_MESH_EN)
00253     uint16_t sn;
00255     uint8_t fn;
00257     uint8_t tid;
00259     uint8_t machdr_len;
00260     #if (RW_MESH_EN)
00262     uint8_t mesh_ctrl_len;
00263     #endif //(RW_MESH_EN)
00265     uint8_t sta_idx;
00267     uint8_t vif_idx;
00269     uint8_t dst_idx;
00271     uint64_t pn;
00273     uint32_t statinfo;
00275     uint32_t host_buf_addr;
00277     struct key_info_tag *key;
00279     struct mac_addr da;
00281     struct mac_addr sa;
00283     uint8_t frame_info;
00285     bool eth_len_present;
00287     uint8_t payl_offset;
00288 };
00289 
00291 struct rx_cntrl_dupli
00292 {
00294     struct mac_addr last_src_addr;
00296     uint16_t last_seq_cntl;
00297 };
00298 
00300 struct rx_cntrl_pm_mon
00301 {
00303     struct mac_addr addr;
00305     uint8_t pm_state;
00307     bool mon;
00308 };
00309 
00310 
00312 struct rxu_cntrl_env_tag
00313 {
00315     struct rx_cntrl_rx_status rx_status;
00317     struct co_list rxdesc_ready;
00319     uint32_t hostid_current;
00321     uint8_t rxdesc_idx;
00322     #if (NX_REORD)
00324     struct co_list rxu_reord_free;
00325     #endif //(NX_REORD)
00327     struct co_list rxu_defrag_free;
00329     struct co_list rxu_defrag_used;
00331     struct rx_cntrl_dupli rxu_dupli;
00333     struct mac_addr *mac_addr_ptr;
00335     struct rx_cntrl_pm_mon pm_mon;
00337     uint32_t ttr;
00338 };
00339 
00341 struct rxu_stat_val
00342 {
00344     uint32_t host_id;
00346     uint32_t frame_len;
00348     uint16_t status;
00349 };
00350 
00352 struct rxu_stat_desc
00353 {
00354     #if NX_FULLY_HOSTED
00356     struct co_list_hdr list_hdr;
00359     struct rxdesc *rxdesc;
00360     #else
00362     struct rx_upload_cntrl_tag upload_cntrl;
00364     struct dma_desc dma_desc;
00365     #endif
00367     struct rxu_stat_val val;
00368 };
00369 
00370 /*
00371  * GLOBAL VARIABLES
00372  ****************************************************************************************
00373  */
00374 extern struct rxu_cntrl_env_tag rxu_cntrl_env;
00375 
00376 #if (NX_REORD)
00378 extern struct rxu_cntrl_reord rxu_cntrl_reord_pool[RX_CNTRL_REORD_POOL_SIZE];
00379 #endif //(NX_REORD)
00380 
00382 extern struct rxu_cntrl_defrag rxu_cntrl_defrag_pool[RX_CNTRL_DEFRAG_POOL_SIZE];
00383 
00385 extern struct rxu_stat_desc rxu_stat_desc_pool[RX_STAT_DESC_CNT];
00386 
00387 /*
00388  * FUNCTION PROTOTYPES
00389  ****************************************************************************************
00390  */
00404 bool rxu_cntrl_frame_handle(struct rxdesc* rxdesc);
00405 
00406 #if (NX_REORD)
00407 struct sta_info_tag;
00420 bool rxu_cntrl_reord_create(struct sta_info_tag *sta, uint8_t tid, uint16_t ssn);
00421 
00430 void rxu_cntrl_reord_delete(struct sta_info_tag *sta, uint8_t tid);
00431 
00432 #endif //(NX_REORD)
00433 
00442 void rxu_cntrl_init(void);
00443 
00453 void rxu_cntrl_monitor_pm(struct mac_addr *addr);
00454 
00465 uint8_t rxu_cntrl_get_pm(void);
00466 
00477 void rxu_cntrl_evt(int dummy);
00478 
00486 bool rxu_cntrl_desc_check(void);
00487 
00488 
00490 
00491 #endif // _RXU_CNTRL_H_
/space/home/slher/rel/Beken/v6_4_5/macsw/ip/umac/src/rxu/rxu_cntrl.h
