/space/home/slher/rel/Beken/v6_4_5/macsw/ip/lmac/src/tx/txl/txl_he.h

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#ifndef _TXL_HE_H_
#define _TXL_HE_H_


/*
 * INCLUDE FILES
 ****************************************************************************************
 */
#include "co_int.h"
#include "hal_desc.h"
#include "mm_timer.h"

#if NX_MAC_HE
struct sta_info_tag;
struct vif_info_tag;
struct txdesc;
struct rxdesc;
struct mm_set_mu_edca_req;
struct mm_set_uora_req;
/*
 * TYPE and STRUCT DEFINITIONS
 ****************************************************************************************
 */
struct mu_edca_param_tag
{
    struct tx_hd *first_frame_exch;
    uint32_t edca;
    uint8_t timeout;
    uint8_t timer;
    bool edca_off;
};


struct uora_tag
{
    uint8_t eocw_min;
    uint8_t eocw_max;
};
struct mu_edca_tag
{
    struct mm_timer_tag timer;
    struct mu_edca_param_tag params[NX_TXQ_CNT];
    uint8_t edca_stopping;
    uint8_t he_tb_activity;
    bool valid;
};

struct he_trigger_tag
{
    struct sta_info_tag *sta;
    uint32_t uph;
    uint32_t max_len;
    struct mac_addr ta;
    uint16_t mmss;
    uint16_t ul_length;
    uint8_t ac;
    uint8_t trig_type;
    uint8_t gi_type;
    uint8_t ul_mcs;
    uint8_t ul_nss;
    uint8_t ul_bw;
    uint8_t ru_size;
    uint8_t pref_ac;
    uint8_t spacing_factor;
    bool uora;
    bool trig_valid;
};

struct txl_he_env_tag
{
    #if NX_UMAC_PRESENT && NX_BEACONING
    struct mm_timer_tag trig_timer;
    #endif
    struct vif_info_tag *tb_vif;
    struct mu_edca_tag mu_edca;
    struct uora_tag uora;
    struct he_trigger_tag trigger;
    bool tb_ongoing;
};

/*
 * DEFINES
 ****************************************************************************************
 */
#define TX_HE_TB_PROG_TIME 5

#define TX_HE_BSR_FULL (MAC_HTC_HE_CTRL_ID_BSR | MAC_HTC_HE_BSR_QSIZE_ALL_MSK |          \
                        MAC_HTC_HE_BSR_QSIZE_HIGH_MSK | MAC_HTC_HE_BSR_SCALING_FAC_MSK | \
                        MAC_HTC_HE_BSR_DELTA_TID_MSK)

/*
 * GLOBAL VARIABLE DECLARATION
 ****************************************************************************************
 */
extern struct txl_he_env_tag txl_he_env;

/*
 * FUNCTION PROTOTYPES
 ****************************************************************************************
 */

__INLINE uint32_t txl_he_tb_uph_get(void)
{
    return (txl_he_env.trigger.uph);
}

uint32_t txl_he_htc_get(struct txdesc *txdesc, struct sta_info_tag *sta);

__INLINE bool txl_he_is_he_su(uint32_t rate_info)
{
    uint32_t format = (rate_info & FORMAT_MOD_TX_RCX_MASK) >> FORMAT_MOD_TX_RCX_OFT;

    return (format == FORMATMOD_HE_SU);
}

__INLINE bool txl_he_is_edca_off(uint8_t access_category)
{
    return (txl_he_env.mu_edca.params[access_category].edca_off);
}

__INLINE void txl_he_ltf_type_set(uint32_t rate_info, uint32_t *pwr_info)
{
    int he_ltf_type = TX_2x_HE_LTF_FOR_6_4_US;
    // Check GI type and update HE-LTF type accordingly
    if ((rate_info & HE_GI_TYPE_TX_RCX_MASK) == GI_TYPE_3_2)
        he_ltf_type = TX_4x_HE_LTF_FOR_12_8_US;

    *pwr_info &= ~TX_HE_LTF_TYPE_PT_RCX_MASK;
    *pwr_info |= he_ltf_type;
}

__INLINE bool txl_he_tb_ongoing(uint8_t *ac)
{
    *ac = txl_he_env.trigger.ac;

    return (txl_he_env.tb_ongoing);
}

__INLINE bool txl_he_tb_can_chain_edca(uint8_t ac)
{
    uint8_t tb_ac;

    return (!txl_he_is_edca_off(ac) && (!txl_he_tb_ongoing(&tb_ac) || (tb_ac != ac)));
}

__INLINE uint8_t txl_he_get_queue_size(uint32_t buffered)
{
    uint8_t queue_size, sf = 0, uv = 0;
    const uint8_t sf_oft = 6;

    if(buffered <= 1008)
    {
        sf = 0;
        uv = (CO_ALIGNx_HI(buffered, 16)) / 16;
    }
    else if (buffered <= 1024)
    {
        sf = 1;
        uv = 0;
    }
    else if (buffered <= 17152)
    {
        sf = 1;
        uv = (CO_ALIGNx_HI(buffered - 1024, 16)) / 16;
    }
    else if (buffered <= 17408)
    {
        sf = 2;
        uv = 0;
    }
    else if (buffered <= 146432)
    {
        sf = 2;
        uv = (CO_ALIGNx_HI(buffered - 17408, 2048)) / 2048;
    }
    else if (buffered <= 148480)
    {
        sf = 3;
        uv = 0;
    }
    else if (buffered <= 2147328)
    {
        sf = 3;
        uv = (CO_ALIGNx_HI(buffered - 148480, 32768)) / 32768;
    }
    else if (buffered < 4294967295)
    {
        sf = 3;
        uv = 62;
    }
    else // Queue size is unspecified or unknown
    {
        sf = 3;
        uv = 63;
    }

    queue_size = (sf << sf_oft) | uv;

    return queue_size;
}
void txl_he_init(void);

void txl_he_reset(void);

void txl_he_trigger_push(struct rxdesc *rxdesc);

void txl_he_tb_prot_trigger(void);

void txl_he_tb_transmit_cancelled(void);

void txl_he_tb_transmit_trigger(void);

uint32_t txl_he_idx_to_32us_len_get(int base_idx, uint8_t bw);

uint16_t txl_he_idx_to_1us_len_get(int base_idx, uint8_t bw);

int txl_he_ampdu_param_get(struct txdesc *txdesc,
                           uint8_t format_mod,
                           uint32_t *max_len_sta,
                           uint32_t *nss);

bool txl_he_decode_m_ba(struct rxdesc *badesc, struct tx_agg_desc *agg_desc);

void txl_he_mu_edca_param_set(struct mm_set_mu_edca_req const *param);

void txl_he_uora_param_set(struct mm_set_uora_req const *param);

void txl_he_mu_edca_blocked(struct tx_hd *thd, uint8_t ac);

void txl_he_tb_config(void);

void txl_he_tb_disable(void);

void txl_he_tb_enable(void);


void txl_he_non_edca_chain(struct tx_hd *first_thd,
                           struct tx_hd *last_thd,
                           uint8_t access_category);

#if NX_UMAC_PRESENT && NX_BEACONING

void txl_he_start_trigger_scheduler(struct sta_info_tag *sta);
#endif // NX_UMAC_PRESENT && NX_BEACONING

void txl_he_txop_dur_rtscts_thres_ampdu_check(struct txdesc *txdesc);

void txl_he_txop_dur_rtscts_thres_mpdu_check(struct txdesc *txdesc);

void txl_he_bsr_compute(struct vif_info_tag *vif);

#endif // NX_MAC_HE


#endif // _TXL_HE_H_

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